ATOMIC_CAS(3)

ATOMIC_CAS(3) | Library Functions Manual | ATOMIC_CAS(3)

# NAME

`atomic_cas`, `atomic_cas_32`, `atomic_cas_uint`, `atomic_cas_ulong`, `atomic_cas_ptr`, `atomic_cas_64`, `atomic_cas_32_ni`, `atomic_cas_uint_ni`, `atomic_cas_ulong_ni`, `atomic_cas_ptr_ni`, `atomic_cas_64_ni` —
atomic compare-and-swap operations

# SYNOPSIS

`#include <sys/atomic.h>`

uint32_t
`atomic_cas_32`(volatile uint32_t *ptr, uint32_t expected, uint32_t new);

unsigned int
`atomic_cas_uint`(volatile unsigned int *ptr, unsigned int expected, unsigned int new);

unsigned long
`atomic_cas_ulong`(volatile unsigned long *ptr, unsigned long expected, unsigned long new);

void *
`atomic_cas_ptr`(volatile void *ptr, void *expected, void *new);

uint64_t
`atomic_cas_64`(volatile uint64_t *ptr, uint64_t expected, uint64_t new);

uint32_t
`atomic_cas_32_ni`(volatile uint32_t *ptr, uint32_t expected, uint32_t new);

unsigned int
`atomic_cas_uint_ni`(volatile unsigned int *ptr, unsigned int expected, unsigned int new);

unsigned long
`atomic_cas_ulong_ni`(volatile unsigned long *ptr, unsigned long expected, unsigned long new);

void *
`atomic_cas_ptr_ni`(volatile void *ptr, void *expected, void *new);

uint64_t
`atomic_cas_64_ni`(volatile uint64_t *ptr, uint64_t expected, uint64_t new);

# DESCRIPTION

The `atomic_cas` family of functions perform an atomic conditional assignment. The value new is assigned to the variable referenced by ptr. The assignment succeeds if and only if its current value matches the value expected. If the value is different, the assignment fails and no change is made. This operation is sometimes known as “compare-and-swap”. These functions always return the value found via ptr. Callers test for success by comparing the return value to the value passed as expected; if they are equal then the new value was stored; if they are not, the value was not changed.

The non-interlocked variants, `*_ni`(), guarantee atomicity within the same CPU with respect to interrupts and preemption. They are not atomic with respect to different CPUs. These can be used to avoid interprocessor synchronization overhead in some cases; for example, they are suitable for synchronized operations on a variable shared by a thread and an interrupt that are bound to the same CPU.

The 64-bit variants of these functions are available only on platforms that can support atomic 64-bit memory access. Applications can check for the availability of 64-bit atomic memory operations by testing if the pre-processor macro `__HAVE_ATOMIC64_OPS` is defined.

# SEE ALSO

atomic_ops(3)

# HISTORY

The `atomic_cas` functions first appeared in NetBSD 5.0.

# NOTES

On some architectures, a `*_ni`() variant is merely an alias for the corresponding standard compare-and-swap operation. While the non-interlocked variant behaves correctly on those architectures, it does not avoid the interprocessor synchronization overhead.

February 2, 2014 | NetBSD 9.5